Design and Implementation of Equiripple FIR Lowpass Filter on FPGA: A Case Study
نویسندگان
چکیده
This paper demonstrates the design and implementation of Equiripple linear-phase FIR lowpass filter. The filter is modeled using Simulink in Xilinx System Generator. The filter Coefficients are generated with the help of FDA tools, and the System Generator tool is used for RTL code generation. Further the model is used as a filter block to interface with ADC-DAC block in VHDL. The design has been prototyped on Spartan-3 DSP prototype board XC3S500fg320 using Integrated Synthesis Environment (ISE) 13.1 tools all in one design suit from Xilinx. Finally the filters are tested by using an audio signal as input and the output is observed in CRO & speaker both.
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